XCV400-4HQG240I

560-MBGA, Field Programmable Gate Array, 66-MHz, XCV400-4HQG240I, –0.5 to 3.0V

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Price:: US $1.00~100.00 / piece [Get Latest Price]

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PartNumber:: XCV400-4HQG240I

Brand:: Xilinx, Inc - Xilinx | Pack: QFP | D/C: 09+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2012-03-29

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Product Summary

The XCV400-4HQG240I is a Field Programmable Gate Array. It delivers high-performance, high-capacity programmable logic solutions. Dramatic increases in silicon efficiency result from optimizing the new architecture for place-and-route efficiency and exploiting an aggressive 5-layer-metal 0.22 um CMOS process. These advances make XCV400-4HQG240I powerful and flexible alternatives to mask-programmed gate arrays. Building on experience gained from previous generations of FPGAs, the XCV400-4HQG240I represents a revolutionary step forward in programmable logic design.

Parametrics

XCV400-4HQG240I absolute maximum ratings: (1)Supply voltage relative to GND: –0.5 to 3.0V; (2)Supply voltage relative to GND:–0.5 to 4.0V; (3)Input reference voltage:–0.5 to 3.6V; (4)Input voltage relative to GND: 5V tolerant I/O:–0.5 to 5.5V, No 5V tolerance:–0.5 to VCCO+0.5V; (5)Voltage applied to 3-state output 5V tolerant I/O:–0.5 to 5.5V, No 5V tolerance:–0.5 to VCCO +0.5V; (6)Storage temperature (ambient):–65 to +150℃; (7)Junction temperature:+125℃.

Features

XCV400-4HQG240I features: (1)Densities from 50k to 1M system gates; (2)System performance up to 200 MHz; (3)66-MHz PCI Compliant; (4)Hot-swappable for Compact PCI; (5)16 high-performance interface standards; (6)Connects directly to ZBTRAM devices; (7)LUTs configurable as 16-bit RAM, 32-bit RAM, 16-bit dual-ported RAM, or 16-bit Shift Register; (8)Configurable synchronous dual-ported 4k-bit RAMs; (9)Fast interfaces to external high-performance RAMs; (10)Dedicated carry logic for high-speed arithmetic; (11)Dedicated multiplier support; (12)Cascade chain for wide-input functions; (13)Abundant registers/latches with clock enable, and dual synchronous/asynchronous set and reset; (14)Internal 3-state bussing; (15)IEEE 1149.1 boundary-scan logic; (16)Die-temperature sensor diode; (17)0.22 μm 5-layer metal process; (18)100% factory tested.